Low-voltage and Standard-voltage Operation? Internally Organized as 2, x 8 16K? I2C-compatible 2-wire Serial Interface? Bidirectional Data Transfer Protocol?
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The memory is configured as pages with each page containing 16 bytes. This device offers significant advantages in low power and low voltage applications. It offers a flexible byte write and a faster byte page write.
The data in the upper half of memory can be protected by a write protect pin. Pin 1, 2, and 3 are not connected NC.
Pin 4 is the ground Vss. Pin 5 is the serial data SDA pin used for bidirectional transfer of data. Pin 6 is the serial clock SCL input pin. Pin 7 is the write protect WP input pin, and Pin 8 is the power supply Vcc pin. All data is serially transmitted in bytes 8 bits on the SDA bus.
The B bits are the 3 most significant bits of the SDA memory address. After each byte is transmitted, the receiver has to provide an acknowledge by pulling the SDA bus low on the ninth clock cycle. The acknowledge is a handshake signal to the transmitter indicating a successful data transmission. For normal write operation, the write protect pin should be grounded. When this pin is left unconnected, WP is interpreted as zero. The pin is an open-drain output.
A pullup resistor must be connected from SDA to Vcc. It is used in conjunction with SDA to define the start and stop conditions. The Turbo IC 24C16 acknowledges after each byte transmission. For a read operation, the master issues a start condition and a device address byte. The master acknowledges, indicating that it requires more data bytes. The Turbo IC 24C16 transmits more data bytes, with the memory address counter automatically incrementing for each data byte, until the master does not acknowledge, indicating that it is terminating the transmission.
The master then issues a stop condition. The protocol defines any device that sends data onto the SDA bus as a transmitter, and the receiving device as a receiver. The device controlling the transfer is the master and the device being controlled is the slave. The master always initiates the data transfers, and provides the clock for both transmit and receive operations.
The Turbo IC 24C16 acts as a slave device in all applications. Either the master or the slave can take control of the SDA bus, depending on the requirement of the protocol.
The acknowledge protocol is used as a handshake signal to indicate successful transmission of a byte of data. The receiver pulls the SDA bus low during the ninth clock cycle to acknowledge the successful transmission of a byte of data. If the SDA is not pulled low during the ninth clock cycle, the Turbo IC 24C16 terminates the data transmission and goes into standby mode.
For the write operation, the Turbo IC 24C16 acknowledges after the device address byte, acknowledges after the memory address byte, and acknowledges after each subsequent data byte. For the read operation, the Turbo IC 24C16 acknowledges after the device address byte. Then the Turbo IC 24C16 transmits each subsequent data byte, and the master acknowledges after each data byte transfer, indicating that it requires more data bytes.
To terminate the transmission, the master does not acknowledge, and then sends a stop condition.
24C16 Просмотр технического описания (PDF) - STMicroelectronics
24C16 Microchip Technology Inc., 24C16 Datasheet
24C16 Datasheet PDF - STMicroelectronics